TMS29LF040 datasheet(13/38 Pages) TI

13 / 38 page

TMS29LF040, TMS29VF040

524288 BY 8-BIT

FLASH MEMORIES

SMJS825D – SEPTEMBER 1995 – REVISED JUNE 1998

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

electrical dc characteristics over recommended ranges of supply voltage and ambient

temperature

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

VIH

High-level dc input voltage

CMOS

0.7 * VCC

VCC + 0.3

VIL

Low-level dc input voltage

CMOS

– 0.5

0.8

VID

Algorithm-selection and sector-protect/unprotect

input voltage

VCC = 3.3 V

11.5

12.5

VOH

High level dc output voltage

CMOS

VCC =VCC MIN†

IOH = – 2.0 mA

0.85 * VCC

VOH

High-level dc output voltage

CMOS

VCC =VCC MIN

IOH = – 100 µA

VCC – 0.4

VOL

Low-level dc output voltage

(see Note 4)

CMOS

VCC =VCC MIN

IOL = 4.0 mA

0.45

Input current (leakage)

VCC =VCC MAX

VI =VSS to VCC

±1

µA

Output current (leakage)

VCC =VCC MAX

VO =VSS to VCC

±1

µA

IID

High-voltage load current

VCC =VCC MAX

A9 = 12.5 V

µA

ICC1

VCC active current (see Note 5)

E = VIL,G = VIH

ICC2

VCC active current (see Notes 6)

E = VIL,G = VIH

ICC3

VCC supply current

(standby)

CMOS-input level

VCC = VCC MAX

E = VCC ± 0.3 V

100

µA

† See the recommended operating conditions table.

NOTES:

4. 5.8-mA IOL also available

5. ICC current in the read mode, switching at 6 MHz, IOUT = 0 mA

6. ICC current while erase or program operation is in progress

capacitance over recommended ranges of supply voltage and ambient temperature

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

Ci1

Input capacitance (All inputs except A9, E, G)

VI = 0 V, f = 1 MHz

7.5

Ci2

Input capacitance (A9, E, G)

VI = 0 V, f = 1 MHz

Output capacitance

VO = 0 V, f = 1 MHz

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