ICS84427CMLF datasheet(8/16 Pages) IDT

8 / 16 page

CRYSTAL-TO-LVDS

INTEGRATED FREQUENCY SYNTHESIZER/FANOUT BUFFER

84427 DATA SHEET

REVISION B 5/6/15

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

OUTPUTS:

LVDS

All unused LVDS output pairs can be either left ﬂoating or

terminated with 100

Ω across. If they are left ﬂoating, we

recommend that there is no trace attached.

LVCMOS TO XTAL INTERFACE

The XTAL_IN input can accept a single-ended LVCMOS signal

through an AC coupling capacitor. A general interface diagram is

shown in Figure 3. The XTAL_OUT pin can be left ﬂoating. The

input edge rate can be as slow as 10ns. For LVCMOS inputs,

it is recommended that the amplitude be reduced from full

swing to half swing in order to prevent signal interference with

the power rail and to reduce noise. This conﬁguration requires

FIGURE 3. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE

that the output impedance of the driver (Ro) plus the series

resistance (Rs) equals the transmission line impedance. In

addition, matched termination at the crystal input will attenuate

the signal in half. This can be done in one of two ways. First, R1

and R2 in parallel should equal the transmission line impedance.

For most 50

Ω applications, R1 and R2 can be 100Ω. This can

also be accomplished by removing R1 and making R2 50

Ω.

Zo = 50

VDD

Zo = Ro + Rs

VDD

XTAL_IN

XTAL_OUT

.1uf

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