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STM32F358XC bảng dữ liệu(PDF) 93 Page - STMicroelectronics |
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STM32F358XC bảng dữ liệu(HTML) 93 Page - STMicroelectronics |
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93 / 134 page ![]() DocID025540 Rev 4 93/134 STM32F358xC Electrical characteristics 118 SPI/I2S characteristics Unless otherwise specified, the parameters given in Table 62 for SPI or in Table 63 for I2S are derived from tests performed under ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 24. Refer to Section 6.3.13: I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO for SPI and WS, CK, SD for I2S). Table 62. SPI characteristics(1) Symbol Parameter Conditions Min Typ Max Unit fSCK 1/tc(SCK) SPI clock frequency Master mode,SPI1/2/3 -- 18 MHz Slave mode,SPI1/2/3 18 Slave mode transmitter/full duplex SPI1/2/3 12.5(2) Duty(SCK) SPI slave input clock duty cycle Slave mode 30 50 70 % tsu(NSS) NSS setup time Slave mode, SPI presc = 2 4*Tpclk - - ns th(NSS) NSS hold time Slave mode SPI presc = 2 2*Tpclk - - tw(SCKH) tw(SCKL) SCK high and low time Master mode, fPCLK = 36 MHz, presc = 4 Tpclk-2 Tpclk Tpclk+2 tsu(MI) tsu(SI) Data input setup time Master mode 5.5 - - Slave mode 6.5 - - th(MI) Data input hold time Master mode 5 - - th(SI) Slave mode 5 - - ta(SO) Data output access time Slave mode, fPCLK = 24 MHz 0 - 4*Tpclk tdis(SO) Data output disable time Slave mode 0 - 24 tv(SO) Data output valid time Slave mode (after enable edge) - 25 39 tv(MO) Data output valid time Master mode (after enable edge) - 1.5 3 th(SO) Data output hold time Slave mode (after enable edge) 11 - - th(MO) Master mode (after enable edge) 0 - - 1. Data based on characterization results, not tested in production. 2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into SCK low or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master having tsu(MI) = 0 while Duty(SCK) = 50%. |
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