STM8TL52X4 datasheet(39/84 Pages) STMICROELECTRONICS

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STM8TL52x4 STM8TL53x4

Interrupt vector mapping

TIM3

TIM3 capture/compare

interrupt

Yes

0x00 8060

23-

Reserved

0x00 8064-

0x00 806B

TIM4

TIM4 update/overflow/



trigger interrupt

Yes

0x00 806C

SPI

SPI TX buffer empty/



RX buffer not empty/



error/wakeup interrupt

Yes

0x00 8070

USART

USART transmit data



transmission complete



interrupt

Yes

0x00 8074

USART

USART received data



ready/overrun error/



idle line detected/parity



error/global error

interrupt

Yes

0x00 8078

I2C

I2C interrupt(3)

Yes

0x00 807C

1. The Low power wait mode is entered when executing a WFE instruction in Low power run mode. In WFE mode, the

interrupt is served if it has been previously enabled. After processing the interrupt, the processor goes back to WFE mode.

When the interrupt is configured as a wakeup event, the CPU wakes up and resumes processing.

2. ProxSense activated before executing HALT instruction.

3. The device is woken up from Halt or Active-halt mode only when the address received matches the interface address.

Table 9. Interrupt mapping (continued)

IRQ

No.

Source

block

Description

Wakeup

from Halt

mode

Wakeup

from

Active-halt

mode

Wakeup

from Wait

(WFI

mode)

Wakeup

from Wait

(WFE

mode)(1)

Vector

address

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