STM8L101X2 datasheet(22/88 Pages) STMICROELECTRONICS

22 / 88 page

Pin description

STM8L101x1 STM8L101x2 STM8L101x3

22/88

DocID15275 Rev 16

Warning:

For the STM8L101F1U6ATR, STM8L101F2U6ATR,

STM8L101F3U6ATR, STM8L101G2U6ATR and

STM8L101G3U6ATR part numbers (devices with COMP_REF

pin), all ports available on 32-pin packages must be

considered as active ports. To avoid spurious effects, the

user has to configure them as input pull-up. A small increase

in consumption (typ. < 300 µA) may occur during the power

up and reset phase until these ports are properly configured.

2626 30PC5

I/O X

Port C5 -

2727 31PC6

I/O X

Port C6 -

20 20 3

28 28 32

PA0(5)/SWIM/

BEEP/IR_TIM (6)

I/O X

X(5) XHS(6) XX

Port A0

SWIM input and

output /Beep

output/Timer Infrared

output

1. Please refer to the warning below.

2. At power-up, the PA1/NRST pin is a reset input pin with pull-up. To be used as a general purpose pin (PA1), it can be

configured only as a general purpose pin (PA1), it can be configured only as output push-pull, not neither as output open-

drain nor as a general purpose input. Refer to Section Configuring NRST/PA1 pin as general purpose output in the STM8L

reference manual (RM0013).

3. A pull-up is applied to PB0 and PB4 during the reset phase. These two pins are input floating after reset release.

4. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up and protection diode to VDD are

not implemented).

5. The PA0 pin is in input pull-up during the reset phase and after reset release.

6. High sink LED driver capability available on PA0.

Slope control of all GPIO pins can be programmed except true open drain pins and by

default is limited to 2 MHz.

Table 4. STM8L101xx pin description (continued)

Pin number

Pin name

Input

Output

Alternate function

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