ST72325AR7-Auto datasheet(182/243 Pages) STMICROELECTRONICS

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ST72325xxx-Auto

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Doc ID 13770 Rev 3

18.1.1

Inherent

All Inherent instructions consist of a single byte. The opcode fully specifies all the required

information for the CPU to process the operation.

Long

Indirect

Indexed

ld A,([$10.w],X)

0000..FFFF

00..FF

word

+ 2

Relative

Direct

jrne loop

PC+/-127

+ 1

Relative

Indirect

jrne [$10]

PC+/-127

00..FF

byte

+ 2

Bit

Direct

bset $10,#7

00..FF

+ 1

Bit

Indirect

bset [$10],#7

00..FF

byte

+ 2

Bit

Direct

Relative

btjt $10,#7,skip

00..FF

+ 2

Bit

Indirect

Relative

btjt [$10],#7,skip 00..FF

00..FF

byte

+ 3

Table 98.

CPU addressing mode overview (continued)

Mode

Syntax

Destination

Pointer

address

(Hex.)

Pointer

size

(Hex.)

Length

(bytes)

Table 99.

Inherent instructions

Instruction

Function

NOP

No operation

TRAP

S/W Interrupt

WFI

Wait For Interrupt (Low Power Mode)

HALT

Halt Oscillator (Lowest Power Mode)

RET

Sub-routine Return

IRET

Interrupt Sub-routine Return

SIM

Set Interrupt Mask (level 3)

RIM

Reset Interrupt Mask (level 0)

SCF

Set Carry Flag

RCF

Reset Carry Flag

RSP

Reset Stack Pointer

Load

CLR

Clear

PUSH/POP

Push/Pop to/from the stack

INC/DEC

Increment/Decrement

TNZ

Test Negative or Zero

CPL, NEG

1 or 2 Complement

MUL

Byte Multiplication

SLL, SRL, SRA, RLC, RRC

Shift and Rotate Operations

SWAP

Swap Nibbles

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