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TMS320VC5402 bảng dữ liệu(PDF) 36 Page - Texas Instruments |
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TMS320VC5402 bảng dữ liệu(HTML) 36 Page - Texas Instruments |
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36 / 72 page ![]() TMS320VC5402 FIXEDPOINT DIGITAL SIGNAL PROCESSOR SPRS079G − OCTOBER 1998 − REVISED OCTOBER 2008 36 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 electrical characteristics over recommended operating case temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VOH High-level output voltage IOH = MAX 2.4 V VOL Low-level output voltage IOL = MAX 0.4 V IIZ Input current for outputs in high D[15:0], HD[7:0] Bus holders enabled, DVDD = MAX, VI = VSS to DVDD −175 175 µA IIZ outputs in high impedance All other inputs DVDD = MAX, VO = VSS to DVDD −5 5 µA X2/CLKIN} −40 40 TRST With internal pulldown −5 300 II Input current HPIENA With internal pulldown (VI = VSS to DV ) −5 300 µA II Input current TMS, TCK, TDI, HPIw With internal pullups, HPIENA = 0 (VI = VSS to DVDD) −300 5 µA All other input-only pins −5 5 All other input-only pins −5 5 IDDC Supply current, core CPU CVDD = 1.8 V, fclock = 100 MHz¶, TC = 25°C# 45 mA IDDP Supply current, pins DVDD = 3.3 V, fclock = 100 MHz¶, TC = 25°C|| 30 mA IDD Supply current, standby IDLE2 PLL × 1 mode, 100 MHz input 2 mA IDD Supply current, standby IDLE3 Divide-by-two mode, CLKIN stopped 20 µA Ci Input capacitance 5 pF Co Output capacitance 5 pF † All values are typical unless otherwise specified. ‡ All revisions of the 5402 can be operated with an external clock source, provided that the proper voltage levels be driven on the X2/CLKIN pin. It should be noted that the X2/CLKIN pin is referenced to the device 1.8V power supply (CVdd), rather than the 3V I/O supply (DVdd). Refer to the recommended operating conditions section of this document for the allowable voltage levels of the X2/CLKIN pin. § HPI input signals except for HPIENA. ¶ Clock mode: PLL × 1 with external source # This value represents the current consumption of the CPU, on-chip memory, and on-chip peripherals. Conditions include: program execution from on-chip RAM, with 50% usage of MAC and 50% usage of NOP instructions. Actual operating current varies with program being executed. || This value was obtained using the following conditions: external memory writes at a rate of 20 million writes per second, CLKOFF=0, full-duplex operation of McBSP0 and McBSP1 at a rate of 10 million bits per second each, and 15-pF loads on all outputs. For more details on how this calculation is performed, refer to the Calculation of TMS320C54x Power Dissipation Application Report (literature number SPRA164). |
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