TNETV6421INZDU4 datasheet(97/222 Pages) TI1

tên linh kiện	TNETV6421INZDU4

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TMS320C6421

Fixed-Point Digital Signal Processor

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SPRS346D – JANUARY 2007 – REVISED JUNE 2008

The EMBK0, EMBK1, EMBK2, EMBK3 fields in the VDD3P3V_PWDN register determine the power state

of the EMIFA Block pins. The EMIFA Block pins default to powered up. For more details on the EMBK0,

EMBK1, EMBK2, EMBK3 fields in the VDD3P3V_PWDN register, see Section 3.2, Power Considerations.

To understand pin multiplexing in the EMIFA Block, see Section 3.7.3.11.1, EMIFA Block Major

Configuration Choices to determine the major configuration choices (A,B,C,D,E, or F). Section 3.7.3.11.2,

EMIFA Block Pin-By-Pin Multiplexing Summary, provides a pin-by-pin muxing summary for the EMIFA

Block. For more information on the PINMUX0 and PINMUX1 registers, see Section 3.7.2, Pin Muxing

Selection After Reset.

3.7.3.11.1 EMIFA Block Major Configuration Choices

Table 3-37 shows the major configuration choices in the EMIFA Block. Use this table to determine all of

the PINMUX settings for the EMIFA Block: AEM, RMII, CS5SEL, CS4SEL, and CS3SEL.

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Device Configurations

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