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TNETV6421INZDU4 bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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TNETV6421INZDU4 bảng dữ liệu(HTML) 5 Page - Texas Instruments |
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5 / 222 page ![]() Contents TMS320C6421 Fixed-Point Digital Signal Processor www.ti.com SPRS346D – JANUARY 2007 – REVISED JUNE 2008 Ranges of Supply Voltage and Operating 1 TMS320C6421 Fixed-Point Digital Signal Temperature (Unless Otherwise Noted) ........... 111 Processor .................................................. 1 6 Peripheral Information and Electrical 1.1 Features .............................................. 1 Specifications ......................................... 113 1.2 Description ............................................ 2 6.1 Parameter Information ............................. 113 1.3 Functional Block Diagram ............................ 4 6.2 Recommended Clock and Control Signal Transition Revision History ............................................... 6 Behavior ............................................ 114 2 Device Overview ......................................... 7 6.3 Power Supplies .................................... 114 2.1 Device Characteristics ................................ 7 6.4 Enhanced Direct Memory Access (EDMA3) 2.2 C64x+ Megamodule .................................. 8 Controller ........................................... 122 2.3 Memory Map Summary ............................. 14 6.5 Reset ............................................... 135 2.4 Pin Assignments .................................... 16 6.6 External Clock Input From MXI/CLKIN Pin ........ 144 2.5 Terminal Functions .................................. 24 6.7 Clock PLLs ......................................... 146 2.6 Device Support ...................................... 56 6.8 Interrupts ........................................... 152 2.7 Device and Development-Support Tool 6.9 External Memory Interface (EMIF) ................. 155 Nomenclature ....................................... 56 6.10 Universal Asynchronous Receiver/Transmitter 2.8 Documentation Support ............................. 58 (UART) ............................................. 163 3 Device Configurations ................................. 59 6.11 Inter-Integrated Circuit (I2C) ....................... 166 3.1 System Module Registers ........................... 59 6.12 Host-Port Interface (HPI) Peripheral ............... 170 3.2 Power Considerations ............................... 60 6.13 Multichannel Buffered Serial Port (McBSP) ........ 175 3.3 Clock Considerations ................................ 62 6.14 Multichannel Audio Serial Port (McASP0) Peripheral .......................................... 183 3.4 Boot Sequence ...................................... 64 6.15 Ethernet Media Access Controller (EMAC) ........ 191 3.5 Configurations At Reset ............................. 73 6.16 Management Data Input/Output (MDIO) .......... 200 3.6 Configurations After Reset .......................... 75 6.17 Timers .............................................. 202 3.7 Multiplexed Pin Configurations ...................... 79 6.18 Pulse Width Modulator (PWM) ..................... 204 3.8 Device Initialization Sequence After Reset ........ 103 6.19 VLYNQ ............................................. 206 3.9 Debugging Considerations ......................... 105 6.20 General-Purpose Input/Output (GPIO) ............. 210 4 System Interconnect ................................. 107 6.21 IEEE 1149.1 JTAG ................................. 214 4.1 System Interconnect Block Diagram ............... 107 7 Mechanical Data ....................................... 216 5 Device Operating Conditions ....................... 109 7.1 Thermal Data for ZWT ............................. 216 5.1 Absolute Maximum Ratings Over Operating Temperature Range (Unless Otherwise Noted) ... 109 7.1.1 Thermal Data for ZDU ............................. 217 5.2 Recommended Operating Conditions ............. 110 7.1.2 Packaging Information ............................. 217 5.3 Electrical Characteristics Over Recommended Submit Documentation Feedback Contents 5 |
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