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STM32F411RET6 bảng dữ liệu(PDF) 108 Page - STMicroelectronics

tên linh kiện STM32F411RET6
Giải thích chi tiết về linh kiện  ARM® Cortex®-M4 32b MCUFPU, 125 DMIPS, 512KB Flash, 128KB RAM, USB OTG FS, 11 TIMs, 1 ADC, 13 comm. interfaces
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Electrical characteristics
STM32F411xC STM32F411xE
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DocID026289 Rev 6
Figure 34. SPI timing diagram - slave mode and CPHA = 0
ta(SO)
Data output access time Slave mode
7
-
21
ns
tdis(SO)
Data output disable time Slave mode
5
-
12
ns
tv(SO)
Data output valid time
Slave mode (after enable edge),
2.7 V < VDD < 3.6 V
-11
13
ns
Slave mode (after enable edge),
1.7 V < VDD < 3.6 V
-11
18.5
ns
th(SO)
Data output hold time
Slave mode (after enable edge),
1.7 V < VDD < 3.6 V
8-
-
ns
tv(MO)
Data output valid time
Master mode (after enable edge)
-
4
6
ns
th(MO)
Data output hold time
Master mode (after enable edge)
0
-
-
ns
1. Guaranteed by characterization results.
2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into SCK low or
high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master
having tsu(MI) = 0 while Duty(SCK) = 50%
Table 60. SPI dynamic characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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