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STM32F411CE bảng dữ liệu(PDF) 82 Page - STMicroelectronics |
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STM32F411CE bảng dữ liệu(HTML) 82 Page - STMicroelectronics |
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82 / 149 page ![]() Electrical characteristics STM32F411xC STM32F411xE 82/149 DocID026289 Rev 6 6.3.8 External clock source characteristics High-speed external user clock generated from an external source In bypass mode the HSE oscillator is switched off and the input pin is a standard I/O. The external clock signal has to respect the Table 53. However, the recommended clock input waveform is shown in Figure 22. The characteristics given in Table 35 result from tests performed using an high-speed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 14. Table 34. Low-power mode wakeup timings(1) Symbol Parameter Min(1) Typ(1) Max(1) Unit tWUSLEEP(2) Wakeup from Sleep mode - 4 6 CPU clock cycle tWUSTOP(2) Wakeup from Stop mode, usage of main regulator - 13.5 14.5 µs Wakeup from Stop mode, usage of main regulator, Flash memory in Deep power down mode -105 111 Wakeup from Stop mode, regulator in low power mode - 21 33 Wakeup from Stop mode, regulator in low power mode, Flash memory in Deep power down mode - 113 130 tWUSTDBY(2)(3) Wakeup from Standby mode - 314 407 µs tWUFLASH Wakeup of Flash from Flash_Stop mode - - 8 µs Wakeup of Flash from Flash Deep power down mode - - 100 1. Guaranteed by characterization results. 2. The wakeup times are measured from the wakeup event to the point in which the application code reads the first instruction. 3. tWUSTDBY maximum value is given at –40 °C. Table 35. High-speed external user clock characteristics Symbol Parameter Conditions Min Typ Max Unit fHSE_ext External user clock source frequency(1) - 1- 50 MHz VHSEH OSC_IN input pin high level voltage 0.7VDD -VDD V VHSEL OSC_IN input pin low level voltage VSS -0.3VDD tw(HSEH) tw(HSEL) OSC_IN high or low time(1) 5- - ns tr(HSE) tf(HSE) OSC_IN rise or fall time(1) -- 10 Cin(HSE) OSC_IN input capacitance(1) -- 5 - pF DuCy(HSE) Duty cycle - 45 - 55 % IL OSC_IN Input leakage current VSS ≤VIN ≤VDD -- ±1 µA 1. Guaranteed by design. |
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