AIS2120SX datasheet(13/58 Pages) STMICROELECTRONICS

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DocID028312 Rev 3

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AIS1120SX / AIS2120SX

Block diagrams and pin description

1.1.8

Signal delays

Figure 9. Signal delay of reading-chain blocks with 400 Hz filter

Figure 10. Signal delay of reading-chain blocks with 800 Hz filter

Figure 11. Signal delay of reading-chain blocks with 1600 Hz filter

1.1.9

Offset cancellation

The offset cancellation is performed in the last step of the digital signal processing and

includes two modes:

1. Slow offset cancellation

2. Fast offset cancellation

The digital low-pass filter with selectable bandwidth (fast, slow cancellation) is controlled by

a state machine. Fast offset cancellation is used after power-on. Slow offset cancellation, for

continuously running offset cancellation, operates in normal mode.

Offset cancellation uses a moving average filter with a fixed update limit. Fast offset

cancellation occurs after power up while EOI = 0. Slow offset cancellation occurs after EOI

is set to 1.

The Offset Cancellation Error Flag is set when the offset is outside the offset correction

range (±1020 LSB) during slow offset cancellation. A hardware error is indicated based on

this flag being set for the affected axis. The flow chart for the offset cancellation block is

shown in the following figure.

AIS2120SX bảng dữ liệu(PDF) 13 Page - STMicroelectronics