6

Notes:

1. For some functions that share a register address in HWindow0, the opposite access type (read/write) is available in HWindow 15 if

indicated by the three asterisks (***).

2. These registers are not available in the industry standard 80C196KD. Therefore, industry standard development software will not recognize these

mnemonics, and you will only be able to access them via their physical addresses.

Table 7. SFR Memory Mapping

Address

HWin 0 Read

HWin 0 Write

HWin 1

019H

Stack Pntr (hi)

Stack Pntr (hi)

Stack Pntr (hi)

Stack Pntr (hi)

018H

Stack Pntr (lo)

Stack Pntr (lo)

Stack Pntr (lo)

Stack Pntr (lo)

017H

IOS2

PWM0_CTRL

PWM2_CTRL

***

016H

IOS1

IOC1

PWM1_CTRL

***

015H

IOS0

IOC0

***

014H

WSR

WSR

WSR

WSR

013H

INT_MASK1

INT_MASK1

INT_MASK1

INT_MASK1

012H

INT_PEND1

INT_PEND1

INT_PEND1

INT_PEND1

011H

SP_STAT

SP_CON

RESERVED

***

010H

PORT 2

PORT 2

RESERVED

PSW

2

00FH

PORT 1

PORT 1

Timer 3(hi)

2

RESERVED

00EH

PORT 0

BAUD RATE

Timer 3(lo)

2

RESERVED

00DH

Timer 2 (hi)

Timer 2 (hi)

WDT-SCALE

2

T2CAPTURE (hi)

00CH

Timer 2 (lo)

Timer 2 (lo)

IOC3

T2CAPTURE (lo)

00BH

Timer 1 (hi)

IOC2

***

00AH

Timer 1 (lo)

Watchdog

***

009H

INT_PEND

INT_PEND

INT_PEND

INT_PEND

008H

INT_MASK

INT_MASK

INT_MASK

INT_MASK

007H

SBUF (RX)

SBUF (TX)

PTSSRV (hi)

***

006H

HSI_status

HSO_command

PTSSRV (lo)

***

005H

HSI_time(hi)

HSO_time (hi)

PTSSEL (hi)

***

004H

HSI_time (lo)

HSO_time (lo)

PTSSEL (lo)

***

003H

RESERVED

HSI_mode

RESERVED

***

002H

RESERVED

RESERVED

RESERVED

RESERVED

001H

Zero_reg (hi)

Zero_reg (hi)

Zero-reg (hi)

Zero_reg (hi)

000H

Zero_reg (lo)

Zero_reg (lo)

Zero_reg (lo)

Zero_reg (lo)