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AD7403

Data Sheet

INPUT FILTER

In a typical use case for directly measuring the voltage across a

shunt resistor, the AD7403 can be connected directly across the

shunt resistor with a simple RC low-pass filter on each input.

The recommended circuit configuration for driving the

differential inputs to achieve best performance is shown in

Figure 33. An RC low-pass filter is placed on both the analog

input pins. Recommended values for the resistors and capacitors

are 10 Ω and 220 pF, respectively. If possible, equalize the

source impedance on each analog input to minimize offset.

VIN–

VIN+

AD7403

Figure 33. RC Low-Pass Filter Input Network

The input filter configuration for the AD7403 is not limited to

the low-pass structure shown in Figure 33. The differential RC

filter configuration shown in Figure 34 also achieves excellent

performance. Recommended values for the resistors and

capacitor are 22 Ω and 47 pF, respectively.

VIN–

VIN+

AD7403

Figure 34. Differential RC Filter Network

Figure 35 compares the typical performance for the input filter

structures outlined in Figure 33 and Figure 34 for different

resistor and capacitor values.

100

1000

DECIMATION RATE

LOW PASS,

10Ω, 220pF

DIFFERENTIAL,

22Ω, 47pF

DIFFERENTIAL,

22Ω, 10nF

fIN = 1kHz

Figure 35. SNR vs. Decimation Rate for Different Filter Structures for Different

Resistor and Capacitor Values

DIGITAL FILTER

The output of the AD7403 is a continuous digital bit stream. To

reconstruct the original input signal information, this output

bit stream needs to be digitally filtered and decimated. A sinc

filter is recommended due to its simplicity. A sinc3 filter is

recommended because it is one order higher than that of the

AD7403 modulator, which is a second-order modulator. The type

of filter selected, the decimation rate, and the modulator clock used

determines the overall system resolution and throughput rate. The

higher the decimation rate, the greater the system accuracy, as

illustrated in Figure 36. However, there is a trade-off between

accuracy and throughput rate and, therefore, higher decimation

rates result in lower throughput solutions. Note that for a given

bandwidth requirement, a higher MCLKIN frequency can allow

higher decimation rates to be used, resulting in higher SNR

performance.

100

1000

DECIMATION RATE

SINC1

SINC2

SINC3

SINC4

fIN = 1kHz

Figure 36. SNR vs. Decimation Rate for Different Sincx Filter Orders

A sinc3 filter is recommended for the AD7403. This filter can

be implemented on a field programmable gate array (FPGA) or

a digital signal processor (DSP).

Equation 1 describes the transfer function of a sinc filter.













−

)

(

)

(

)

(

(1)

where:

DR is the decimation rate.

N is the sinc filter order.

The throughput rate of the sinc filter is determined by the

modulator clock and the decimation rate selected.

MCLK

Throughput

(2)

where MCLK is the modulator clock frequency

As the decimation rate increases, the data output size from the

sinc filter increases. The output data size is expressed in

Equation 3. The 16 most significant bits are used to return a

16-bit result.

Data size = N × log2 DR

(3)

Rev. B | Page 18 of 24

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