For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824

Phone: 978-250-3343

Fax: 978-250-3373

Order On-line at www.hittite.com

Application Support: Phone: 978-250-3343 or apps@hittite.com

34

HMC702LP6CE

v10.0812

14 GHz 16-BIT FRACTIONAL-N PLL

Table 31. Reg 1Ah Lock Detect Register

Bit

Type

Name

Default

Description

9:0

r/W

lkd_wincnt_max

40h

threshold count in the timer window to declare

lock (reference cycles)

10

r/W

lkd_win_asym_enable

0

Enables asymmetric lock detect window (nominal

10nsec)

11

r/W

lkd_win_asym_up_select

0

Sets polarity of the window

12

r/W

lkd_to_sdo_automux_en

1

Muxes the lkd output signal to SDo when SDo is

not being used for Main Serial Port Data outputs

(read operation)

13

r/W

lkd_to_sdo_always

0

Muxes the lkd output signal to SDo always, not

possible to do Main Serial Port read in this state

14

r/W

lkd_ringosc_mono_select

0

1 select ringosc based oneshot for lock detect

window

0 selects analog based oneshot

16:15

r/W

lkd_ringosc_cfg

0

“00” fastest “11” slowest

18:17

r/W

lkd_monost_duration

0

“00” shortest “11” longest

19

r/W

lkd_ringosc_testmode

0

enables the ring osc by itself for testing

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