2.6.3 RF_CP[1:0] — Charge Pump Gain, RF Synthesizer

The RF_CP word is used to control the charge pump gain for the RF synthesizer. Four different CP gains are supported ranging

from 1 to 16 mA. Note that when RF FastLock mode is enabled and the synthesizer is operating in the FastLock state, the charge

pump gain is controlled by the RF_CPF[1:0] control word. Higher charge pump currents yield slightly better phase noise, but lead

to larger loop filter capacitors and slightly higher current consumption in cases where the comparison frequency is very high.

RF_CP[1:0]

Charge Pump Current

01 mA

14 mA

28 mA

316 mA

2.6.4 RF_CPP — Phase Detector Polarity, RF Synthesizer

This bit controls the polarity of phase detector for the RF synthesizer. It should be set to one when the chosen RF VCO has

positive tuning gain, and zero when the tuning gain is negative.

2.6.5 RF_P — Prescaler, RF Synthesizer

The RF synthesizer utilizes a selectable quadruple modulus prescaler. RF_P selects between the 8/9/12/13 prescaler and the

16/17/20/21 prescaler as described in the table below.

RF_P[1:0]

Selected Prescaler

0

8 (8/9/12/13)

1

16 (16/17/20/21)

2.6.6 RF_RST — Counter Reset, RF Synthesizer

The RF Counter Reset enable bit when activated (RF_RST = 1) allows the reset of both the RF N and RF R dividers. Upon

powering up, the N counter resumes counting in "close" alignment with the R counter. The maximum error is one prescaler cycle.

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