Programming Description

2.0 INPUT DATA REGISTER

The 24-bit input data register is loaded through the MICROWIRE Interface. The input data register is used to program the control

registers. The data format of the 24-bit data register is shown below. The control bits (CTL[2:0]) decode the internal register

address and the data bits (DATA[21:0]) are used to program various control words for the synthesizer. On the rising edge of LE,

data stored in the input date register is loaded into one of the 8 appropriate latches (selected by control bits). Data is shifted in

MSB first

MSB

LSB

DATA [21:0]

CTL[2:0]

23

3 2

0

2.1 REGISTER LOCATION TRUTH TABLE

The control bits CTL[2:0] decode the internal register address. The table below shows how the control bits are mapped to the

target control register.

CTL[2:0]

Target Control Register

0R0

1R1

2R2

3R3

4R4

5R5

6R6

7

This address is invalid.

2.2 CONTROL REGISTER CONTENT MAP

The control register content map describes how the bits within each control register are allocated to specific control functions. The

bits that are marked “0” should be programmed as such to insure proper device operation. It is important to note that some control

words are dual mapped and take one a different control function depending on the operating mode of the device.

Reg

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9876543210

DATA[20:0]

C2

C1

C0

R0

000

IF_

RST

IF_

CP

IF_

CPP

IF_R[14:0]

0

0

0

R1

IF_

PD

0

0

0

IF_N[16:0]

0

0

1

R2

0000000

IF_TOC[13:0]

0

1

0

R3

RF_

RST

RF_

P

RF_

CPP

RF_

CP[1:0]

RF_R[8:0]

RF_FD[6:0]

0

1

1

R4

RF_

PD

RF_N[12:0]

RF_FN[6:0]

1

0

0

R5

0

RF_

CSR[1:0]

RF_

OM[1:0]

RF_

CPF[1:0]

RF_TOC[13:0]

1

0

1

R6

0000000

FE

0000000

PD_

M

OSC

MUX[3:0]

1

1

0

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