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UPSD323X bảng dữ liệu(PDF) 156 Page - STMicroelectronics

tên linh kiện UPSD323X
Giải thích chi tiết về linh kiện  Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
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UPSD323X bảng dữ liệu(HTML) 156 Page - STMicroelectronics

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Table 119. External Data Memory AC Characteristics (with the 3V MCU Module)
Note: 1. Conditions (in addition to those in Table 110, VCC = 3.0 to 3.6V): VSS = 0V; CL for Port 0, ALE and PSEN output is 100pF, for 5V
devices, and 50pF for 3V devices; CL for other outputs is 80pF, for 5V devices, and 50pF for 3V devices)
Table 120. A/D Analog Specification
Symbol
Parameter1
24MHz Oscillator
Variable Oscillator
1/tCLCL = 8 to 24MHz
Unit
Min
Max
Min
Max
tRLRH
RD pulse width
180
6tCLCL –70
ns
tWLWH
WR pulse width
180
6tCLCL –70
ns
tLLAX2
Address hold after ALE
56
2tCLCL –27
ns
tRHDX
RD to valid data in
118
5tCLCL –90
ns
tRHDX
Data hold after RD
0
0
ns
tRHDZ
Data float after RD
63
2tCLCL –20
ns
tLLDV
ALE to valid data in
200
8tCLCL – 133
ns
tAVDV
Address to valid data in
220
9tCLCL – 155
ns
tLLWL
ALE to WR or RD
75
175
3tCLCL –50
tCLCL +50
ns
tAVWL
Address valid to WR or RD
67
4tCLCL –97
ns
tWHLH
WR or RD High to ALE High
17
67
tCLCL –25
tCLCL +25
ns
tQVWX
Data valid to WR transition
5
tCLCL –37
ns
tQVWH
Data set-up before WR
170
7tCLCL –122
ns
tWHQX
Data hold after WR
15
tCLCL –27
ns
tRLAZ
Address float after RD
0
0
ns
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
AVREF
Analog Power Supply Input
Voltage Range
VSS
VCC
V
VAN
Analog Input Voltage Range
VSS –0.3
AVREF + 0.3
V
IAVDD
Current Following between VCC
and VSS
200
µA
CAIN
Overall Accuracy
±2
l.s.b.
NNLE
Non-Linearity Error
±2
l.s.b.
NDNLE
Differential Non-Linearity Error
±2
l.s.b.
NZOE
Zero-Offset Error
±2
l.s.b.
NFSE
Full Scale Error
±2
l.s.b.
NGE
Gain Error
±2
l.s.b.
TCONV
Conversion Time
at 8MHz clock
20
µs



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