MPC82L52 datasheet(19/144 Pages) MEGAWIN

19 / 144 page

MEGAWIN

MPC82x52 Data Sheet

6. Memory Organization

Like all 80C51 devices, the MPC82E/L52 has separate address spaces for program and data memory. The

logical separation of program and data memory allows the data memory to be accessed by 8-bit addresses,

which can be quickly stored and manipulated by the 8-bit CPU.

Program memory (ROM) can only be read, not written to. There can be up to 8K bytes of program memory. In

the MPC82E/L52, all the program memory are on-chip Flash memory, and without the capability of accessing

external program memory because of no External Access Enable (/EA) and Program Store Enable (/PSEN)

signals designed.

Data memory occupies a separate address space from program memory. In the MPC82E/L52, there is only a

256 bytes of internal scratch-pad RAM.

6.1. On-Chip Program Flash

Program memory is the memory which stores the program codes for the CPU to execute, as shown in Figure 6

–1.

After reset, the CPU begins execution from location 0000H, where should be the starting of the user‘s application

code. To service the interrupts, the interrupt service locations (called interrupt vectors) should be located in the

program memory. Each interrupt is assigned a fixed location in the program memory. The interrupt causes the

CPU to jump to that location, where it commences execution of the service routine. External Interrupt 0, for

example, is assigned to location 0003H. If External Interrupt 0 is going to be used, its service routine must begin

at location 0003H. If the interrupt is not going to be used, its service location is available as general purpose

program memory.

The interrupt service locations are spaced at an interval of 8 bytes: 0003H for External Interrupt 0, 000BH for

Timer 0, 0013H for External Interrupt 1, 001BH for Timer 1, etc. If an interrupt service routine is short enough (as

is often the case in control applications), it can reside entirely within that 8-byte interval. Longer service routines

can use a jump instruction to skip over subsequent interrupt locations, if other interrupts are in use.

Figure 6

–1. Program Memory

0000H

0003H

0013H

001BH

Interrupt

Locations

Reset

000BH

8 bytes

Program

Memory

1FFFH

MPC82L52 bảng dữ liệu(PDF) 19 Page - Megawin Technology Co., Ltd