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MPC82L52 bảng dữ liệu(PDF) 49 Page - Megawin Technology Co., Ltd

tên linh kiện MPC82L52
Giải thích chi tiết về linh kiện  Interrupt controller
PDF  144 Pages
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nhà sản xuất  MEGAWIN [Megawin Technology Co., Ltd]
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MPC82L52 bảng dữ liệu(HTML) 49 Page - Megawin Technology Co., Ltd

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MEGAWIN
MPC82x52 Data Sheet
49
13.2. Interrupt Source
Table 13
–2. Interrupt flags
No
Source Name
Request Bits
Bit Location
#1
External Interrupt, INT0
IE0
TCON.1
#2
Timer 0
TF0
TCON.5
#3
External Interrupt, INT1
IE1
TCON.3
#4
Timer 1
TF1
TCON.7
#5
Serial Port
RI
TI
SCON.0
SCON.1
#6
SPI/ADC
SPIF,
WCOL,
ADCI
SPISTAT.7~6
ADCTL.4
#7
PCA/LVF
CF,
CCFn (n=0~1),
LVF
CCON.7
CCON.1~0
PCON.5
The external interrupt INT0 and INT1 can each be either level-activated or transition-activated, depending on bits
IT0 and IT1 in register TCON. The flags that actually generate these interrupts are bits IE0 and IE1 in TCON.
When an external interrupt is generated, the flag that generated it is cleared by the hardware when the service
routine is vectored to only if the interrupt was transition
–activated, then the external requesting source is what
controls the request flag, rather than the on-chip hardware.
The Timer0 and Timer1 interrupts are generated by TF0 and TF1, which are set by a rollover in their respective
Timer/Counter registers in most cases. When a timer interrupt is generated, the flag that generated it is cleared
by the on-chip hardware when the service routine is vectored to.
The serial port interrupt is generated by the logical OR of RI and TI. Neither of these flags is cleared by hardware
when the service routine is vectored to. The service routine should poll RI and TI to determine which one to
request service and it will be cleared by software.
The SPI/ADC interrupt is shared by the logical OR of SPI interrupt (SPIF and WCOL) and ADC interrupt (ADCI).
Neither of these flags is cleared by hardware when the service routine is vectored to. The service routine should
poll them to determine which one to request service and it will be cleared by software.
The PCA/LVF interrupt is shared by the logical OR of PCA interrupt (CF, CCF0 and CCF1) and LVD (Low-
Voltage Detector) interrupt (LVF on PCON.5). Neither of these flags is cleared by hardware when the service
routine is vectored to. The service routine should poll them to determine which one to request service and it will
be cleared by software.



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