LAN8742AI-CZ datasheet(41/124 Pages) MICROCHIP

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DS00001989A-page 41

LAN8742A/LAN8742Ai

The Wakeup Control and Status Register (WUCSR) also provides a WoL Configured bit, which may be set by software

after all WoL registers are configured. Because all WoL related registers are not affected by software resets, software

can poll the WoL Configured bit to ensure all WoL registers are fully configured. This allows the software to skip repro-

gramming of the WoL registers after reboot due to a WoL event.

The following subsections detail each type of WoL event. For additional information on the main system interrupts, refer

to Section 3.6, "Interrupt Management".

3.8.4.1

Perfect DA (Destination Address) Detection

When enabled, the Perfect DA detection mode allows the triggering of the nINT or nPME pin when a frame with the

destination address matching the address stored in the MAC Receive Address A Register (RX_ADDRA), MAC Receive

Address B Register (RX_ADDRB), and MAC Receive Address C Register (RX_ADDRC) is received. The frame must

also pass the FCS and packet length check.

As an example, the Host system must perform the following steps to enable the device to assert nINT on detection of a

Perfect DA WoL event:

Set the desired MAC address to cause the wake event in the MAC Receive Address A Register (RX_ADDRA),

MAC Receive Address B Register (RX_ADDRB), and MAC Receive Address C Register (RX_ADDRC).

Set the Perfect DA Wakeup Enable (PFDA_EN) bit of the Wakeup Control and Status Register (WUCSR) to

enable Perfect DA detection.

Set bit 8 (WoL event indicator) in the Interrupt Mask Register to enable WoL events to trigger assertion of the

nINT interrupt pin.

When a match is triggered, the nINT interrupt pin will be asserted, bit 8 of the Interrupt Source Flag Register will be set,

and the Perfect DA Frame Received (PFDA_FR) bit of the Wakeup Control and Status Register (WUCSR) will be set.

3.8.4.2

Broadcast Detection

When enabled, the Broadcast detection mode allows the triggering of the nINT or nPME pin when a frame with the des-

tination address value of FF FF FF FF FF FF is received. The frame must also pass the FCS and packet length check.

As an example, the Host system must perform the following steps to enable the device to assert nINT on detection of a

Broadcast WoL event:

Set the Broadcast Wakeup Enable (BCST_EN) bit of the Wakeup Control and Status Register (WUCSR) to

enable Broadcast detection.

Set bit 8 (WoL event indicator) in the Interrupt Mask Register to enable WoL events to trigger assertion of the

nINT interrupt pin.

When a match is triggered, the nINT interrupt pin will be asserted, bit 8 of the Interrupt Source Flag Register will be set,

and the Broadcast Frame Received (BCAST_FR) bit of the Wakeup Control and Status Register (WUCSR) will be set.

Note:

Alternatively, the LED1/nINT/nPME or LED2/nINT/nPME pin can be used to indicate a WoL event. Refer

to Section 3.8.4, "Wake on LAN (WoL)" for additional information.

Note:

Alternatively, the LED1/nINT/nPME or LED2/nINT/nPME pin can be used to indicate a WoL event. Refer

to Section 3.8.4, "Wake on LAN (WoL)" for additional information.

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