công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

LE25S161 bảng dữ liệu(PDF) 16 Page - ON Semiconductor

tên linh kiện LE25S161
Giải thích chi tiết về linh kiện  Serial Flash Memory
PDF  54 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  ONSEMI [ON Semiconductor]
Trang chủ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

LE25S161 bảng dữ liệu(HTML) 16 Page - ON Semiconductor

Back Button LE25S161 Datasheet HTML 12Page - ON Semiconductor LE25S161 Datasheet HTML 13Page - ON Semiconductor LE25S161 Datasheet HTML 14Page - ON Semiconductor LE25S161 Datasheet HTML 15Page - ON Semiconductor LE25S161 Datasheet HTML 16Page - ON Semiconductor LE25S161 Datasheet HTML 17Page - ON Semiconductor LE25S161 Datasheet HTML 18Page - ON Semiconductor LE25S161 Datasheet HTML 19Page - ON Semiconductor LE25S161 Datasheet HTML 20Page - ON Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 54 page
background image
LE25S161
www.onsemi.com
16
10. Description of Commands and Operations
A detailed description of the functions and operations corresponding to each command is presented below.
10-1. Read Status Register (RDSR)
The contents of the status registers can be read using the Read Status Register (RDSR). This command can be executed
even during the following operations.
• Erase (SSE, SE or CHE)
• Page Program (PP or PPL)
• Write Status Register (WRSR)
"Figure 2. Read Status Register (RDSR)" shows the timing waveforms.
The sequence of RDSR operation :
CS goes to low  input RDSR command (05h)
 Status Register data (SRWP, SUS, TB, BP2, BP1, BP0,WEN, RDY) out on SO 
completed by CS=high
* The data output starts from the falling edge of SCK(7th clock)
This command outputs the contents of the status registers synchronized to the falling edge of the clock (SCK).
If the clock input is continued after bit0 (RDY) has been output, the data is output by returning to bit7 (SRWP) that was
first output, after which the output is repeated for as long as the clock input is continued. The data can be read by this
command at any time (even during a program, erase cycle). By setting CS to high, the device is deselected, and Read
JEDEC ID cycle is completed. While the device is deselected, the output pin SO is in a high-impedance state
● DATA: Status Resister, "Table 3 Status Register"
Figure 2. Read Status Register (RDSR)
CS
SCK
SI
SO
MSB
MSB
MSB
05h
DATA
DATA
High Impedance
8
3
2
1
0
7
6
5
4
15
23
Mode 3
Mode 0
8CLK
16
DATA
MSB



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com