MCP3918A1T-ESLASHML datasheet(76/88 Pages) MICROCHIP

76 / 88 page

MCP3918

DS20005287A-page 76

 2014 Microchip Technology Inc.

9.8

OFFCAL_CH0 and GAINCAL_CH0

Registers – Digital Offset And

Gain Error Calibration Registers

Name

Bits

Address

Cof.

OFFCAL_CH0

0x0F

R/W

GAINCAL_CH0

0x10

R/W

OFFCAL_CH0 REGISTER

R/W-0

...

R/W-0

OFFCAL_CH0

<23>

OFFCAL_CH0

<22>

OFFCAL_CH0

<21>

...

OFFCAL_CH0

<3>

OFFCAL_CH0

<2>

OFFCAL_CH0

<1>

OFFCAL_CH0

<0>

bit 23

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 23-0

OFFCAL_CH0:

Digital Offset calibration value for the corresponding channel CH0. This register is

simply added to the output code of the channel bit by bit. This register is 24-bit two's

complement MSB first coding. CH0 Output Code = OFFCAL_CH0 + ADC CH0 Output

Code. This register is a Don't Care if EN_OFFCAL = 0 (Offset calibration disabled), but

its value is not cleared by the EN_OFFCAL bit.

GAINCAL_CH0 REGISTER

R/W-0

...

R/W-0

GAINCAL_CH0

<23>

GAIN-

CAL_CH0<22>

GAINCAL_CH0

<21>

...

GAINCAL_CH0

<3>

GAINCAL_CH0

<2>

GAINCAL_CH0

<1>

GAINCAL_CH0

<0>

bit 23

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 23-0

GAINCAL_CH0:

Digital gain error calibration value for the corresponding channel CH0. This register

is signed 24-bit MSB first format with a range of -1x to +0.9999999x (from 0x80000

to 0x7FFFFF). The gain calibration adds 1x to this register and multiplies it to the

output code of the channel bit by bit, after offset calibration. The range of the gain

calibration is thus from 0x to 1.9999999x (from 0x80000 to 0x7FFFFF). The LSB

corresponds to a 2-23 increment in the multiplier.

ADC Output Code = (GAINCAL_CH0+1)*ADC CH0 Output Code. This register is a

Don't Care if EN_GAINCAL = 0 (Gain calibration disabled) but its value is not

cleared by the EN_GAINCAL bit.

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