MCP3918A1T-ESLASHML datasheet(32/88 Pages) MICROCHIP

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MCP3918

DS20005287A-page 32

 2014 Microchip Technology Inc.

5.3.2

MODULATOR INPUT RANGE AND

SATURATION POINT

For a specified voltage reference value of 1.2V, the

modulator specified differential input range is ±600 mV.

The input range is proportional to VREF and scales

according to the VREF voltage. This range ensures the

stability of the modulator over amplitude and frequency.

Outside this range, the modulator is still functional;

however, its stability is no longer ensured and therefore

it is not recommended to exceed this limit. The

saturation point for the modulator is VREF/1.5, since the

transfer function of the ADC includes a gain of 1.5 by

default (independent from the PGA setting). See

Section 5.5 “ADC Output Coding”

5.3.3

BOOST SETTINGS

The delta-sigma modulator includes a programmable

biasing circuit, in order to further adjust the power

consumption to the sampling speed applied through

the MCLK. This can be programmed through the

BOOST<1:0> bits, which are applied to all channels

simultaneously.

The maximum achievable analog master clock speed

(AMCLK), the maximum sampling frequency (DMCLK)

and the maximum achievable data rate (DRCLK) highly

depend on the BOOST<1:0> and PGA_CH0<2:0>

settings. Table 5-2 specifies the maximum AMCLK

possible to keep optimal accuracy with respect to the

BOOST<1:0> and PGA_CH0<2:0> settings.

TABLE 5-2:

MAXIMUM AMCLK LIMITS AS A FUNCTION OF BOOST AND PGA GAIN

Conditions

VDD = 3.0V to 3.6V,

TA from -40°C to +125°C

VDD = 2.7V to 3.6V,

TA from -40°C to +125°C

Boost

Gain

Maximum AMCLK

(MHz)

(SINAD within -3 dB

from its maximum)

Maximum AMCLK

(MHz)

(SINAD within -5 dB

from its maximum)

Maximum AMCLK

(MHz)

(SINAD within -3 dB

from its maximum)

Maximum AMCLK

(MHz)

(SINAD within -5 dB

from its maximum)

0.5x

0.66x

6.4

7.3

6.4

7.3

11.4

10.6

0.5x

0.66x

6.4

7.3

6.4

7.3

11.4

10.6

13.3

14.5

0.5x

2.9

0.66x

6.4

10.7

9.4

10.7

0.5x

2.9

0.66x

7.3

6.4

7.3

11.4

12.3

8.9

11.4

0.5x

2.9

0.66x

6.4

7.3

6.4

7.3

11.4

9.4

10.6

13.3

8.9

11.4

0.5x

2.9

0.66x

7.3

10.6

12.3

9.4

10,6

13.3

11.4

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