MCP3914 datasheet(20/80 Pages) MICROCHIP

20 / 80 page

MCP3914

DS20005216A-page 20

 2013 Microchip Technology Inc.

Each communication starts with a chip select falling

edge followed by an 8-bit command word, entered

through the SDI pin. Each command is either a Read or

a Write command. Toggling SDI after a Read command

or when CS is logic high has no effect.

This input is Schmitt-triggered.

3.15

Master Reset (RESET)

This pin is active low and places the entire chip in a

Reset state when active.

When RESET is logic low, all registers are reset to their

default value, no communication can take place, and

no clock is distributed inside the part, except in the

input structure if MCLK is applied (if MCLK is idle, then

no clock is distributed). This state is equivalent to a

Power-On Reset (POR) state.

Since the default state of the ADCs is on, the analog

power consumption when RESET is logic low is

equivalent to when RESET is logic high. Only the digital

power consumption is largely reduced because this

current consumption is essentially dynamic, and is

reduced drastically when there is no clock running.

All the analog biases are enabled during a Reset, so

that the part is fully operational just after a RESET

rising edge, if MCLK is applied when RESET is logic

low. If MCLK is not applied, there is a time after a hard

reset when the conversion may not accurately

correspond to the startup of the input structure.

This input is Schmitt-triggered.

3.16

Exposed Thermal Pad

This pin must be connected to AGND or left floating for

proper operation. Connecting it to AGND is preferable

for lowest noise performance and best thermal

behavior.

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