PCM4202DBR datasheet(20/26 Pages) BURR-BROWN

20 / 26 page

PCM4202

SBAS290B − JULY 2003 − SEPTEMBER 2004

www.ti.com

POWER-DOWN OPERATION

The PCM4202 can be forced to a power-down state by

applying a low level to the RST input (pin 19) for a minimum

of 65,536 system clock cycles. In power-down mode, all

internal clocks are stopped, and output data pins are

forced low. The system clock may then be removed to

conserve additional power. Before exiting power-down

mode, the system and audio clocks should be restarted.

Once the clocks are active, the RST input may be driven

high, which initiates a reset initialization sequence.

Figure 11 illustrates the state of the output data pins during

before, during, and upon exiting the power-down state.

APPLICATIONS INFORMATION

A typical connection diagram for the PCM4202 is shown

in Figure 12. Capacitors for power supply and reference

bypassing are shown with recommended values. Bypass

capacitors should be located as close as possible to the

power supply and reference pins of the PCM4202. Due to

its small size, the 0.1

µF capacitor can be located on the

component (top) side of the board, while the larger 33

µF

capacitor can be located on the solder (bottom) side of the

board.

A single ground plane is utilized for the analog and digital

ground connections. This approach ensures a low

impedance connection between the analog and digital

ground pins. The +5V analog and +3.3V digital power

connections are provided from separate supplies.

Figure 13 illustrates an example input buffer circuit,

designed for balanced differential input signals. This circuit

is utilized on the PCM4202EVM evaluation board. The

2.7nF and 100pF capacitors shown at the output of the

buffer should be located as close as possible to the analog

input pins of the PCM4202. The buffer shown in Figure 13

can be easily made to function as a single ended to

differential converter by simply grounding the (−) input

terminal of the buffer circuit.

The input impedance for the VCOMIN pin of the OPA1632

is relatively low and will load down the VCOML or VCOMR

outputs from the PCM4202. A voltage follower circuit is

required to buffer these outputs, with a typical circuit

configuration shown in Figure 14. An OPA227 is utilized as

the buffer for the PCM4202EVM evaluation board.

However,

alternative

amps

with

comparable

performance may be substituted.

Output

Data Pins

65,536

SCKI Periods

Valid Output Data

Outputs are

Forced Low

RST

1024

SCKI Periods

Required for

Initialization

Valid Output Data

Outputs are

Forced Low

Outputs are

Forced Low

Enter

Power−Down

State

Figure 11. ADC Digital Output State for Power-Down Operations

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