TMS320VC5407 datasheet(90/110 Pages) TI

90 / 110 page

Electrical Specifications

November 2001 − Revised April 2004

SPRS007D

5.12 Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings

Table 5−19 assumes testing over recommended operating conditions and H = 0.5tc(CO) (see Figure 5−18).

Table 5−19. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Switching Characteristics

PARAMETER

MIN

MAX

UNIT

td(CLKL-IAQL)

Delay time, CLKOUT low to IAQ low

− 1

td(CLKL-IAQH)

Delay time, CLKOUT low to IAQ high

− 1

td(A)IAQ

Delay time, IAQ low to address valid

td(CLKL-IACKL)

Delay time, CLKOUT low to IACK low

− 1

td(CLKL-IACKH)

Delay time, CLKOUT low to IACK high

− 1

td(A)IACK

Delay time, IACK low to address valid

th(A)IAQ

Hold time, address valid after IAQ high

− 2

th(A)IACK

Hold time, address valid after IACK high

− 2

tw(IAQL)

Pulse duration, IAQ low

2H − 2

tw(IACKL)

Pulse duration, IACK low

2H − 2

IACK

IAQ

A[22:0]

CLKOUT

td(A)IACK

td(A)IAQ

tw(IACKL)

th(A)IACK

td(CLKL−IACKL)

tw(IAQL)

th(A)IAQ

td(CLKL−IAQL)

td(CLKL−IACKH)

td(CLKL−IAQH)

Figure 5−18. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings

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