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ST7MC1K2TC bảng dữ liệu(PDF) 164 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI
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MOTOR CONTROLLER (Cont’d)
10.6.6.13 Encoder Mode (IS[1:0] = 11)
Figure 90 shows the signals delivered by a stand-
ard digital incremental encoder and associated in-
formation:
– Two 90° phased square signals with variable
frequency proportional to the speed; they
must be connected to MCIA and MCIB input
pins,
– Clock derived from incoming signal edges,
– Direction information determined by the rela-
tive phase shift of input signals ( + or -90°).
The Incremental Encoder Interface block aims at
extracting these signals. As input logic is both ris-
ing and falling edge sensitive (independently from
TES[1:0] bits setting), resulting clock frequency is
four times the one of the input signals, thus in-
creasing resolution for measurements.
It may be noticed that Direction bit (EDIR bit in
MCRC register) is read only and that it does’nt af-
fect counting direction of clocked timer (cf Section
). As a result, one cannot extract position informa-
tion from encoder inputs during speed reversal.
Figure 89. Tacho Capture events configured by the TES[1:0] bits
Figure 90. Incremental Encoder output signals and derived information
Tacho
input
Tacho
Capture
TES[1:0]=11
TES[1:0]=01
TES[1:0]=10
MCIA
MCIB
Encoder
inputs
Encoder
Direction
Clock
Sampling of MCIA to determine direction
(EDIR bit)
1



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