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TVP7002IPZP bảng dữ liệu(PDF) 10 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  TRIPLE 8-/10-BIT 165-/110-MSPS VIDEO AND GRAPHICS DIGITIZER WITH HORIZONTAL PLL
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TVP7002IPZP bảng dữ liệu(HTML) 10 Page - Texas Instruments

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SDA
t1
t6
t7
t2
t8
t3
t4
t6
SCL
Data
Stop Start
Stop
t5
TVP7002
SLES206C – MAY 2007 – REVISED APRIL 2013
www.ti.com
Timing Requirements
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I2C Host Port
t1
Bus free time between Stop and Start
Specified by design
1.3
μs
t2
Setup time for a (repeated) Start condition
Specified by design
0.6
μs
t3
Hold time (repeated) Start condition
Specified by design
0.6
μs
t4
Setup time for a Stop condition
Specified by design
0.6
ns
t5
Data setup time
Specified by design
100
ns
t6
Data hold time
Specified by design
0
0.9
μs
t7
Rise time, SDA and SCL signal
Specified by design
250
ns
t8
Fall time, SDA and SCL signal
Specified by design
250
ns
Cb
Capacitive load for each bus line
Specified by design
400
pF
fI2C
I2C clock frequency
Specified by design
400
kHz
Figure 2. I2C Host Port Timing
10
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Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: TVP7002



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