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TVP7002IPZP bảng dữ liệu(PDF) 53 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  TRIPLE 8-/10-BIT 165-/110-MSPS VIDEO AND GRAPHICS DIGITIZER WITH HORIZONTAL PLL
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TVP7002IPZP bảng dữ liệu(HTML) 53 Page - Texas Instruments

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TVP7002
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SLES206C – MAY 2007 – REVISED APRIL 2013
REVISION HISTORY
Revision
Comments
SLES206
Initial Release
SLES206A
Changed Functional Block Diagram
Updated Timing Requirements
Changed Sync Activity Detection section
Changed Power Up, Reset, and Initialization section
Editorial changes throughout
SLES206B
Modified pin 73 I2CA pin description in Table 1, Terminal Functions.
Reset and I2C Bus Address Selection section, Modified I2CA description and Table 10.
Modified Supported Formats and Sync Separator sections.
Added format detection information to the Control Registers section
Added sync separator information to the Control Registers section
Modified H-PLL Phase Select register bit description.
Modified Input Mux Select 2 register bit description.
Modified Blue Coarse Offset register bit description.
Modified the Output Timing Information in Figure 6.
Added information to the Embedded Syncs section.
SLES206C
Table 4, Standard: Video, Resolution: 720 x 480i: Changed Line Rate (kHz) from 15.374 to 15.734.
Table 4, Standard: Video, Resolution: 1920 x 1080i: Changed Frame Rate (Hz) from 60 to 30 and from 50 to 25.
Copyright © 2007–2013, Texas Instruments Incorporated
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