GXM datasheet(206/244 Pages) NSC

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Revision 3.1

Instruction Set (Continued)

9.1.4

reg Field

The reg field (Table 9-10) determines which general regis-

ters are to be used. The selected register is dependent on

whether a 16- or 32-bit operation is current and on the sta-

tus of the w bit.

9.1.4.1

sreg2 Field (ES, CS, SS, DS Register

Selection)

The sreg2 field (Table 9-11) is a 2-bit field that allows one

of the four 286-type segment registers to be specified.

9.1.4.2

sreg3 Field (FS and GS Segment Register

Selection)

The sreg3 field (Table 9-12) is 3-bit field that is similar to

the sreg2 field, but allows use of the FS and GS segment

registers.

Table 9-10. General Registers Selected

by reg Field

reg

16-Bit Operation

32-Bit Operation

w = 0w = 1

000

EAX

001

ECX

010

EDX

011

EBX

100

ESP

101

EBP

110

ESI

111

EDI

Table 9-11. sreg2 Field Encoding

sreg2 Field

Segment Register Selected

Table 9-12. sreg3 Field Encoding

sreg3 Field

Segment Register Selected

000

001

010

011

100

101

110

Undefined

111

Undefined

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