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Revision 3.1

Processor Programming (Continued)

3.7

DESCRIPTORS AND SEGMENT MECHANISMS

Memory is divided into contiguous regions called “seg-

ments.” The segments allow the partitioning of individual

elements of a program. Each segment provides a zero

address-based private memory for such elements as

code, data and stack space.

The segment mechanisms select a segment in memory.

Memory is divided into an arbitrary number of segments,

each containing usually much less than the 232 byte (4

GByte) maximum.

There are two segment mechanisms, one for Real and

Virtual 8086 Operating Modes, and one for Protective

Mode.

3.7.1

Real and Virtual 8086 Mode Segment

Mechanisms

Real Mode Segment Mechanism

In real mode operation, the CPU addresses only the low-

est 1 MB of memory. In this mode a selector located in

one of the segment registers is used to locate a segment.

To calculate a physical memory address, the 16-bit seg-

ment base address located in the selected segment regis-

ter is multiplied by 16 and then a 16-bit offset address is

added. The resulting 20-bit address is then extended with

twelve zeros in the upper address bits to crate 32-bit phys-

ical address.

The value of the selector (the INDEX field) is multiplied by

16 to produce a base address (Figure 3-4.) The base

address is summed with the instruction offset value to pro-

duce a physical address.

Virtual 8086 Mode Segment Mechanism

In Virtual 8086 mode the operation is performed as in real

mode except that a paging mechanism is added. When

paging is enabled, the paging mechanism translates the

linear address into a physical address using cached look-

up tables (refer to Section 3.9 “Paging Mechanism” on

page 72).

Figure 3-4. Real Mode Address Calculation

Offset Mechanism

Selected Segment

Offset Address

000h

X16

Linear Address

(Physical Address)

Base Address

12 High Order Address Bits

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