SI5341_16 datasheet(33/53 Pages) SILABS

33 / 53 page

Table 5.14. Absolute Maximum Ratings1, 2, 3, 4

Parameter

Symbol

Test Condition

Value

Units

Storage Temperature Range

TSTG

-55 to +150

°C

DC Supply Voltage

VDD

-0.5 to 3.8

VDDA

-0.5 to 3.8

VDDO5

-0.5 to 3.8

Input Voltage Range

VI1

IN0-IN2, FB_IN

-0.85 to 3.8

VI2

IN_SEL[1:0], RSTb, OEb,

SYNCb, I2C_SEL, SDI, SCLK,

A0/CSb, A1, SDA/SDIO, FINC/

FDEC

-0.5 to 3.8

VI3

XA/XB

-0.5 to 2.7

Latch-up Tolerance

JESD78 Compliant

ESD Tolerance

HBM

100 pF, 1.5 kΩ

2.0

Maximum Junction Temperature in Operation

TJCT

125

°C

Soldering Temperature (Pb-free profile)5

TPEAK

260

°C

Soldering Temperature Time at TPEAK

(Pb-free profile)5

20 to 40

sec

Notes:

1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to

the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for ex-

tended periods may affect device reliability.

2. 64-QFN and 44-QFN packages are RoHS-6 compliant.

3. Moisture sensitivity level is MSL2. For more packaging information, go to the Silicon Labs RoHS information page.

4. The minimum voltage at these pins can be as low as –1.0 V when an AC input signal of 10 MHz or greater is applied. See Table

5.3 Input Clock Specifications on page 20 spec for single-ended AC-coupled fIN < 250 MHz.

5. The device is compliant with JEDEC J-STD-020.

Si5341/40 Rev D Data Sheet

Electrical Specifications

silabs.com | Smart. Connected. Energy-friendly.

Rev. 1.0 | 32

SI5341 bảng dữ liệu(PDF) 33 Page - Silicon Laboratories

SI5341 bảng dữ liệu(HTML) 33 Page - Silicon Laboratories

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

bảng dữ liệu tải về

Link URL