TNETV1002IDZHK datasheet(40/102 Pages) TI1

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MCU Subsystem Functional Overview

June 2001 -- Revised December 2002

SPRS180C

The enhanced emulation features provide the following debugging capabilities:

•

Single processor (MCU only) and multiprocessor (MCU and DSP) debug

•

High-level language and assembly debug (run, halt, step...)

•

Real-time (MCU continuously running) or non-real-time (MCU stopped) debug options

•

Supports both 32- and 16-bit ARM7TDMI modes

•

Endianess transparency

•

Unlimited breakpoints via opcode replacement (software breakpoint)

•

Two hardware breakpoints (one configurable as software breakpoint) with maskable cycle type, address

and data compare

•

Two external breakpoint events (EMU0,EMU1 pins)

•

Internal events generate external triggers

•

Benchmarking/profiling capability

4.1.2 MCU Memory Space

The MCU memory space includes internal RAM, internal peripherals, and areas for access to external

memories and peripherals connected to the CS0--CS3 and CS4 pins, and external SDRAM. The MCU

memory map is summarized in Table 4--1.

Table 4--1. MCU Memory Space

NAME

START ADDRESS

STOP ADDRESS

SIZE IN BYTES

DATA ACCESS

CS0

0000:0000

007F:FFFF

8/16/32

CS1

0080:0000

00FF:FFFF

8/16/32

CS2

0100:0000

017F:FFFF

8/16/32

CS3

0180:0000

01FF:FFFF

8/16/32

CS4

0200:0000

027F:FFFF

8/16/32

Reserved

0280:0000

0FFF:FFFF

SDRAM_CS

1000:0000

11FF:FFFF

32M

8/16/32

Reserved

1200:0000

FFBF:FFFF

Internal SRAM

FFC0:0000

FFC0:3FFF

16K

8/16/32

Reserved

FFC0:4000

FFCF:FFFF

EIM SRAM

FFD0:0000

FFD0:3FFF

16K

8/16/32

Reserved

FFD0:4000

FFDF:FFFF

API RAM

FFE0:0000

FFE0:3FFF

16K

16/32

Reserved

FFE0:4000

FFF3:FFFF

API registers

FFE4:0000

FFE4:0001

Reserved

FFE4:0002

FFFE:FFFF

EIM

FFFF:0000

FFFF:07FF

UART_IRDA

FFFF:0800

FFFF:0FFF

UART

FFFF:1000

FFFF:17FF

I2C

FFFF:1800

FFFF:1FFF

SPI

FFFF:2000

FFFF:27FF

GPIO

FFFF:2800

FFFF:28FF

256

KGPIO

FFFF:2900

FFFF:29FF

256

Timer0

FFFF:2A00

FFFF:2AFF

256

Timer1

FFFF:2B00

FFFF:2BFF

256

Timer2

FFFF:2C00

FFFF:2CFF

256

INTH

FFFF:2D00

FFFF:2DFF

256

MEMINT

FFFF:2E00

FFFF:2EFF

256

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