LP8501 datasheet(15/51 Pages) TI1

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STANDBY

RESET

INTERNAL

STARTUP

SEQUENCE

Write FFh to Reset

POR=H

TSD = H

NORMAL MODE

EN=H (pin) and

CHIP_EN=H (bit)

EN=L (pin) or

CHIP_EN=L (bit)

POR

TSD = L

POWER SAVE

Enter power save

Exit power save

LP8501

www.ti.com

SNVS548D – SEPTEMBER 2008 – REVISED AUGUST 2013

Modes of Operation

RESET In the RESET mode all the internal registers are reset to the default values. Reset is entered always if

FFh is written to Reset Register (3Dh) or internal Power-On Reset (POR) is active. POR will activate

during the chip startup or when the supply voltage VDD fall below 1.5V (typ.). Once VDD rises above 1.5V

(typ.), POR will deactivate, and the chip will continue to the STANDBY mode. The CHIP_EN control bit is

low after POR by default.

STANDBY: The STANDBY mode is entered if the register bit CHIP_EN or the EN pin is LOW, and Reset is not

active. This is the low-power consumption mode, when all circuit functions are disabled. Registers can be

written in this mode if the EN pin is raised to high state so that control bits will be effective right after the

start up.

STARTUP: When CHIP_EN bit is written high and the EN pin is high, the INTERNAL STARTUP SEQUENCE

powers up all the needed internal blocks (VREF, Bias, Oscillator etc.). Startup delay is 500

μs. If the chip

temperature rises too high, the Thermal Shutdown (TSD) disables the chip operation, and chip waits in

STARTUP mode until no thermal shutdown event is present.

NORMAL: During NORMAL mode the user controls the chip using the Control Registers.

POWER SAVE: In POWER SAVE mode analog blocks are disabled to minimize power consumption. See Power

Saving for further information.

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