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LP8501 bảng dữ liệu(PDF) 9 Page - Texas Instruments

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tên linh kiện LP8501
Giải thích chi tiết về linh kiện  LP8501 Multi-Purpose 9-Output LED Driver
PDF  51 Pages
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nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
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LP8501 bảng dữ liệu(HTML) 9 Page - Texas Instruments

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LP8501
www.ti.com
SNVS548D – SEPTEMBER 2008 – REVISED AUGUST 2013
RECOMMENDED EXTERNAL CLOCK SOURCE CONDITIONS
(1) (2)
Symbol
Parameter
Condition
Min
Typ
Max
Units
Logic input CLK
ƒCLK
Clock Frequency
32.7
kHz
tCLKH
High Time
6
µs
tCLKL
Low Time
6
µs
tr
Clock Rise Time
10% to 90%
2
µs
tƒ
Clock Fall Time
90% to 10 %
2
µs
(1)
Specified by design. VEN = 1.65V to VDD.
(2)
The ideal external clock signal for the LP8501 is a 0V to VEN, 25% to 75% duty-cycle square wave. At frequencies above 32.7 kHz,
program execution will be faster and at frequencies below 32.7 kHz program execution will be slower.
SERIAL BUS TIMING PARAMETERS (SDA, SCL)
(1)
Limit
Symbol
Parameter
Units
Min
Max
ƒSCL
Clock Frequency
400
kHz
1
Hold Time (repeated) START Condition
0.6
µs
2
Clock Low Time
1.3
µs
3
Clock High Time
600
ns
4
Setup Time for a Repeated START Condition
600
ns
5
Data Hold Time
50
ns
6
Data Setup Time
100
ns
7
Rise Time of SDA and SCL
20+0.1 Cb
300
ns
8
Fall Time of SDA and SCL
15+0.1 Cb
300
ns
9
Set-up Time for STOP condition
600
ns
10
Bus Free Time between a STOP and a START Condition
1.3
µs
Capacitive Load Parameter for Each Bus Line
Cb
10
200
ns
Load of One Picofarad Corresponds to One Nanosecond
(1)
Specified by design. VEN = 1.65V to VDD.
Copyright © 2008–2013, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Links: LP8501



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