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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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LP3907SQ-PFX6W/NOPB bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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LP3907SQ-PFX6W/NOPB bảng dữ liệu(HTML) 5 Page - Texas Instruments |
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5 / 58 page  5 LP3907 www.ti.com SNVS511S – JUNE 2007 – REVISED APRIL 2016 Product Folder Links: LP3907 Submit Documentation Feedback Copyright © 2007–2016, Texas Instruments Incorporated (1) A: Analog Pin D: Digital Pin G: Ground Pin PWR: Power Pin I: Input Pin I/O: Input/Output Pin O: Output Pin. Pin Functions PIN I/O TYPE(1) DESCRIPTION WQFN NUMBE R DSBGA NUMBER NAME 1 B4, B5 VINLDO12 I PWR Analog power for internal functions (VREF, BIAS, I2C, Logic) 2 C4 EN_T I D Enable for preset power on sequence. (See .) 3 C3 nPOR O D nPOR power on reset pin for both Buck1 and Buck 2. Open drain logic output 100-k Ω pullup resistor. nPOR is pulled to ground when the voltages on these supplies are not good. See Flexible Power-On Reset (Power Good with Delay) section for more info. 4 C5 GND_SW1 G G Buck1 NMOS Power Ground 5 D5 SW1 O PWR Buck1 switcher output pin 6 E5 VIN1 I PWR Power in from either DC source or battery to Buck1 7 D4 ENSW1 I D Enable pin for Buck1 switcher, a logic HIGH enables Buck1 8 E4 FB1 I A Buck1 input feedback terminal 9 D3 GND_C G G Non switching core ground pin 10 E3 AVDD I PWR Analog power for Buck converters 11 E2 FB2 I A Buck2 input feedback terminal 12 D2 ENSW2 I D Enable pin for Buck2 switcher, a logic HIGH enables Buck2 13 E1 VIN2 I PWR Power in from either DC source or Battery to Buck2 14 D1 SW2 O PWR Buck2 switcher output pin 15 C1 GND_SW2 G G Buck2 NMOS power ground 16 C2 SDA I/O D I2C cata (bidirectional) 17 B2 SCL I D I2C clock 18 B1 GND_L G G LDO ground 19 A1 VINLDO1 I PWR Power in from either DC source or battery to input terminal to LDO1 20 A2 LDO1 O PWR LDO1 output 21 B3 ENLDO1 I D LDO1 enable pin, a logic HIGH enables the LDO1 22 A3 ENLDO2 I D LDO2 enable pin, a logic HIGH enables the LDO2 23 A4 LDO2 O PWR LDO2 output 24 A5 VINLDO2 I PWR Power in from either DC source or battery to input terminal to LDO2. DAP DAP GND GND Connection is not necessary for electrical performance, but it is recommended for better thermal dissipation. |
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