THS1041CPWR datasheet(18/42 Pages) TI1

tên linh kiện	THS1041CPWR

Giải thích chi tiết về linh kiện	10-Bit, 40-MSPS ANALOG-TO-DIGITAL CONVERTER WITH PGA AND CLAMP

PDF	42 Pages

Scroll/Zoom	100%

nhà sản xuất	TI1 [Texas Instruments]

Trang chủ	http://www.ti.com

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18 / 42 page

THS1041

SLAS289C − OCTOBER 2001 − REVISED OCTOBER 2004

www.ti.com

PRINCIPLES OF OPERATION

internal reference mode (MODE = AVDD or AVDD/2)

Sample

and

Hold

X−1

ADC

Core

PGA

AIN+

AIN−

Internal

Reference

Buffer

VREF

AGND

AVDD + VREF

AVDD − VREF

Figure 27. ADC Reference Generation, MODE = AVDD/2

Connecting MODE to AVDD or AVDD/2 enables the internal ADC references buffer A2. The outputs of A2 are

connected to the REFT and REFB pins and its inputs are connected to pins VREF and AGND. The resulting

voltages at REFT and REFB are:

REFT

DD )

VREF

REFB

DD *

VREF

Depending on the connection of the REFSENSE pin, the voltage on VREF may be driven by an off-chip source

or by the internal bandgap reference (A1) (see onboard reference generator configuration) to match the

THS1041 input range to their application requirements.

When MODE = AVDD the CLAMPOUT pin provides a buffered, stabilized AVDD/2 output voltage that can be

used as a bias reference for ac coupling networks connecting the signal sources to the AIN+ or AIN− inputs.

This removes the need for the user to provide a stabilized external bias reference.

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THS1041CPWR bảng dữ liệu(PDF) 18 Page - Texas Instruments