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TFP401, TFP401A

SLDS120G – MARCH 2000 – REVISED MAY 2016

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Layout Guidelines (continued)

12.1.2 Routing High-Speed Differential Signal Traces (RxC–, RxC+, Rx0–, Rx0+, Rx1–, Rx1+, Rx2–, Rx2+)

Trace impedance should be controlled for optimal performance. Each differential pair should be equal in length

and symmetrical and should have equal impedance to ground with a trace separation of 2X to 4X Height. A

differential trace separation of 4X Height yields about 6% cross-talk (6% effect on impedance). It is

recommended that differential trace routing should be side by side, though it is not important that the differential

traces be tightly coupled together because tight coupling is not achievable on PCB traces. Typical ratios on

PCBs are only 20-50%, and 99.9% is the value of a well-balanced twisted pair cable.

Each differential trace should be as short as possible (<2" preferably) with no 90" angles. These high-speed

transmission traces should be on Layer 1 (top layer). RxC–, RxC+, Rx0–, Rx0+, Rx1–, Rx1+, Rx2–, Rx2+ signals

all route directly from the DVI connector pins to the device, no external components are needed.

12.1.3 DVI Connector

Clear-out holes for connector pins should leave space between pins to allow continuous ground through the pin

field. Allow enough spacing in ground plane around signal pins vias however, keep enough copper between vias

to allow for ground current to flow between the vias. Avoid creating a large ground plane slot around the entire

connector, minimizing the via capacitance is the goal.

12.2 Layout Example

DVI connector trace matching:

Figure 25. DVI Connector Routing