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TFP401, TFP401A

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SLDS120G – MARCH 2000 – REVISED MAY 2016

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10.2.2.2 Configuration Options

The TFP401 can be configured in several modes depending on the required output format, for example 1-

byte/clock, 2-bytes/clock, falling/rising clock edge. You can leave place holders for future configuration changes.

Figure 20. Configuration Options Design

10.2.2.3 Power Supplies Decoupling

Digital, analog, and PLL supplies must be decoupled from each other to avoid electrical noise on the PLL and the

core.

Figure 21. Power Supplies Decoupling Design