ADC141S626

REF

AMPLIFICATION MODE

G = 2 V/V

1.1k:

1.1k:

680 pF

+5V

LM4132-4.1

+

4.7 PF

0.1 PF

-

+

100 k:

100 k:

V

+

V

-

V

-

V

+

+IN

+5V

100:

T

R

A

N

S

M

I

T

T

E

R

SENSOR

I_LOOP

Fs = 70 kS/s

0.1 PF

10 PF

0.1 PF

+

4.7 PF

+

10 PF

+

+5V

0.1 PF

LMP7312

SNOSB32B – MARCH 2010 – REVISED MARCH 2013

www.ti.com

are connected in a closed, series circuit, loop configuration (Figure 41). Sensors provide an output voltage whose

value represents the physical parameter being measured. The transmitter amplifies and conditions the sensor’s

output, and then converts this voltage to a proportional 4-20mA dc-current that circulates within the closed

series-loop. The loop power-supply generally provides all operating power to the transmitter and receiver, and

any other loop components that require a well-regulated dc voltage. In loop-powered applications, the power

supply’s internal elements also furnish a path for closing the series loop. The receiver/monitor, normally a

subsection of a panel meter or data acquisition system, converts the 4-20mA current back into a voltage which

can be further processed and/or displayed. The high DC performance of the LMP7312 makes this difference

amplifier an ideal choice for use in current loop AFE receiver. The LMP7312 has a low input offset voltage and

low input offset voltage drift when configured in amplification mode. In the circuit shown in Figure 41 the

LMP7312 is in amplification mode with a gain of 2V/V and differential output in order to well match the input

stage of the ADC141S626 (SAR ADC with differential input). The shunt resistor is 100ohm in order to have a

max voltage drop of 2V when 20mA flows in the loop. The first order filter between the LMP7312 and the

ADC141S626 reduces the noise bandwidth and allows handling input signal up to 2kHz. That frequency has

been calculated taking in account the roll off of the filter and ensuring a gain error less than 1LSB of the

ADC141S626. In order to utilize the maximum number of bits of the ADC141S626 in this configuration, a 4.1V

reference voltage is used. With this system, the current of the 4-20mA loop is accurately gained to the full scale

of the ADC and then digitized for further processing.

Figure 41. LMP7312 in 4-20mA Current Loop application

LAYOUT CONSIDERATIONS

Power supply bypassing

In order to preserve the gain accuracy of the LMP7312, power supply stability requires particular attention. The

LMP7312 ensures minimum PSRR of 90dB (or 31.62 µV/V). However, the dynamic range, the gain accuracy and

the inherent low-noise of the amplifier can be compromised by introducing and amplifying power supply noise. To

decouple the LMP7312 from supply line AC noise, a 0.1 µF ceramic capacitor should be located on the supply

line, close to the LMP7312. Adding a 10 µF tantalum capacitor in parallel with the 0.1 µF ceramic capacitor will

reduce the noise introduced to the LMP7312 even further by providing an AC path to ground for most frequency

ranges.

22

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