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LMP7312MA/NOPB bảng dữ liệu(PDF) 18 Page - Texas Instruments |
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LMP7312MA/NOPB bảng dữ liệu(HTML) 18 Page - Texas Instruments |
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18 / 29 page ![]() LMP7312 SNOSB32B – MARCH 2010 – REVISED MARCH 2013 www.ti.com SPI Registers MSB LSB Gain_1 Gain_0 EN_CL Null_SW Hi_Z Gain_0, Gain_1 bit:Gain Values Different gains are available in Attenuation Mode or Amplification Mode according to the following Gain Table. Gain_1 Gain_0 EN_CL Gain Value (V/V) 0 0 0 0.096 0 1 0 0.192 1 0 0 0.384 1 1 0 0.768 1 0 1 1 1 1 1 2 EN_CL bit:Enable Amplification Mode This register selects which input pair is processed. EN_CL Mode Description 0 Attenuation Mode ±VIN inputs are processed through the 104.16k input resistors 1 Amplification Mode ±IN inputs are processed through the 40k input resistors NULL_SW bit: Input Offset Nulling Switch Mode This register selects a mode in which the amplifier is not processing any input but it is configured in unity gain to allow system level amplifier offset calibration. The Nulling Switch mode is available in both single ended and fully differential output mode. The LMP7312 in Nulling Switch and fully differential mode has he following configuration. NULL_SW Mode Description 0 Normal Operation Mode ±VIN and ±IN inputs are processed depending on EN_CL register setting. 1 Nulling Switch Mode Enables to evaluate the offset of the internal amplifier for system level calibration 18 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: LMP7312 |
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