LM97600CIUTSLASHNOPB datasheet(49/58 Pages) TI1

49 / 58 page

LM97600

www.ti.com

SNAS600A – JULY 2012 – REVISED MARCH 2013

Table 22. Channel D Offset Setting(1)

Addr: 0Bh (0 1011b)

POR state: 0000h

Bit

D15

D14

D13

D12

D11

D10

Name

Res

POR

(1)

Note: The Offset registers for each of the four ADCs must be written consistent with the ADC Mode and Input Select settings

Bits 15:7

Offset Magnitude

These 9 bits set the addressed ADC channel offset as follows:

0d = 0 mV

255d = 20 mV

511d = 45 mV

Bit 6

Offset Polarity

When set to 0b, the addressed ADC channel offset is positive. (ADC output code increases). When set

to 1b, the addressed ADC channel offset is negative. (ADC output code decreases).

Bits 5:0

Reserved

Must be set to 000000b

Table 23. Aperture Delay

Addr: 0Ch (0 1100b)

POR state: 0000h

Bit

D15

D14

D13

D12

D11

D10

Name

POR

Bits 15:10

Coarse Delay

These 6 bits select the amount of additional coarse aperture delay.

Typical delay values are:

0d = 0 ps

1d = 20 ps

2d = 40 ps

…

63d = 1260 ps

Bits 9:5

Intermediate Delay

These 5 bits select the amount of additional intermediate aperture delay.

Typical delay values are:

0d = 0 ps

1d = 5 ps

2d = 10 ps

…

63d = 155 ps

Bits 4:0

Fine Delay

These 5 bits select the amount of additional fine aperture delay.

Typical delay values are:

0d = 0 ps

1d = 0.4 ps

2d = 0.8 ps

…

63d = 12.4 ps

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