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LM97600CIUT/NOPB bảng dữ liệu(PDF) 39 Page - Texas Instruments

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LM97600
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SNAS600A – JULY 2012 – REVISED MARCH 2013
Hertz, at the ADC analog input.
(3)
Note that the maximum jitter described above is the Root Sum Square, (RSS), of the jitter from all sources,
including that in the ADC input clock, that added by the system to the ADC input clock and input signals and that
added by the ADC itself. Since the effective jitter added by the ADC is beyond user control, the best the user can
do is to keep the sum of the externally added input clock jitter and the jitter added by the analog circuitry to the
analog signal to a minimum.
Input clock amplitudes above those specified in the Electrical Characteristics table may result in increased input
offset voltage. This would cause the converter to produce an output code other than the expected 128 when both
input pins are at the same potential.
Aperture Delay
The sample clock aperture delay can be manually increased to accommodate subtle layout differences when
synchronizing multiple ADCs. Adjustments are made via the Aperture Delay register (0Ch, Bits 15:0).
It should be noted that by just enabling the aperture delay capability (register 01h; Bit 0), degradation of dynamic
performance is expected, specifically SFDR. It is intended that very small adjustments are used. Larger
increases in phase adjustments will begin to affect SNR and ultimately ENOB. Therefore, the use of coarse
phase adjustment should be minimized in favor of better system design.
CONTROL PINS
Three control pins (without the use of the serial interface) provide control over the operation of the LM97600 and
facilitate its use. These control pins support Calibration, Synchronization of serial data and multiple ADCs, and a
Power Down feature.
Calibration
The LM97600 calibration must be run to achieve specified performance. The calibration procedure is run upon
power-up and can be run any time on command. The calibration procedure is exactly the same whether there is
an input clock present upon power up or if the clock begins some time after application of power. The CalRun
output indicator is high while a calibration is in progress. The calibration duration is nominally 1.16ms (with a 2.5
GHz input clock).
Power-On Calibration
Power-on calibration begins after a time delay following the application of power. This time delay is fixed at
8,388,608 input CLK cycles. With a 2.5 GHz input CLK, this gives an approximate delay of 3.36 ms.
The calibration process will be not be performed if the CAL pin is concurrently high with the application of power.
In this case, the calibration cycle will not begin until the on-command calibration conditions are met. The
LM97600 will function with the CAL pin held high at power up, but no calibration will be done and performance
will be impaired. A manual calibration, however, may be performed after powering up with the CAL pin high. See
the On-Command Calibration section.
On-Command Calibration
To initiate an on-command calibration, bring the CAL pin high for a minimum of 80 input clock cycles after it has
been low for a minimum of 80 input clock cycles. Holding the CAL pin high upon power up will prevent execution
of power-on calibration until the CAL pin is low for a minimum of 80 input clock cycles, then brought high for a
minimum of another 80 input clock cycles. The calibration cycle will begin 80 input clock cycles after the CAL pin
is thus brought high. The CalRun signal should be monitored to determine when the calibration cycle has
completed.
The minimum 80 input clock cycle sequences are required to ensure that random noise does not cause a
calibration to begin when it is not desired. As mentioned in the OVERVIEW section for best performance, a
calibration should be performed 20 seconds or more after power up and repeated when the operating
temperature changes significantly relative to the specific system design performance requirements. ENOB
changes slightly with increasing junction temperature and can be easily corrected by performing an on-command
calibration.
Copyright © 2012–2013, Texas Instruments Incorporated
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