WM8993 datasheet(113/229 Pages) WOLFSON

tên linh kiện	WM8993

Giải thích chi tiết về linh kiện	Audio Hub CODEC for Multimedia Phones

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Production Data

WM8993

PD, November 2010, Rev 4.0

113

Figure 46 I2S Justified Audio Interface (assuming n-bit word length)

In DSP mode, the left channel MSB is available on either the 1st (mode B) or 2nd (mode A) rising

edge of BCLK (selectable by AIF_LRCLK_INV) following a rising edge of LRCLK. Right channel data

immediately follows left channel data. Depending on word length, BCLK frequency and sample rate,

there may be unused BCLK cycles between the LSB of the right channel data and the next sample.

In device master mode, the LRC output will resemble the frame pulse shown in Figure 47 and Figure

48. In device slave mode, Figure 49 and Figure 50, it is possible to use any length of frame pulse

less than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK period

before the rising edge of the next frame pulse.

Figure 47 DSP Mode Audio Interface (mode A, AIF_LRCLK_INV=0, Master)

Figure 48 DSP Mode Audio Interface (mode B, AIF_LRCLK_INV=1, Master)

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