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WM8993 bảng dữ liệu(PDF) 78 Page - Wolfson Microelectronics plc

tên linh kiện WM8993
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WM8993
Production Data
w
PD, November 2010, Rev 4.0
78
The speaker output PGA controls are shown in Table 49.The SPKOUT_VU bits control the loading of
the speaker PGA volume data. When SPKOUT_VU is set to 0, the volume control data will be
loaded into the respective control register, but will not actually change the gain setting. The speaker
PGA volume settings are both updated when a 1 is written to either SPKOUT_VU bit. This makes it
possible to update the gain of both output paths simultaneously.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R38 (26h)
Speaker
Volume Left
8
SPKOUT_VU
N/A
Speaker Output PGA Volume
Update
Writing a 1 to this bit will update
SPKLVOL and SPKRVOL volumes
simultaneously.
7
SPKOUTL_ZC
0b
SPKLVOL (Left Speaker Output
PGA) Zero Cross Enable
0 = Zero cross disabled
1 = Zero cross enabled
6
SPKOUTL_MUTE_N
1b
SPKLVOL (Left Speaker Output
PGA) Mute
0 = Mute
1 = Un-mute
5:0
SPKOUTL_VOL [5:0]
39h
(0dB)
SPKLVOL (Left Speaker Output
PGA) Volume
-57dB to +6dB in 1dB steps
(See Table 50 for output PGA
volume control range)
R39 (27h)
Speaker
Volume Right
8
SPKOUT_VU
N/A
Speaker PGA Volume Update
Writing a 1 to this bit will update
SPKLVOL and SPKRVOL volumes
simultaneously.
7
SPKOUTR_ZC
0b
SPKRVOL (Right Speaker Output
PGA) Zero Cross Enable
0 = Zero cross disabled
1 = Zero cross enabled
6
SPKOUTR_MUTE_N
1b
SPKRVOL (Right Speaker Output
PGA) Mute
0 = Mute
1 = Un-mute
5:0
SPKOUTR_VOL [5:0]
39h
(0dB)
SPKRVOL (Right Speaker Output
PGA) Volume
-57dB to +6dB in 1dB steps
(See Table 50 for output PGA
volume control range)
Table 49 Speaker Output PGA (SPKLVOL, SPKRVOL) Control



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