AT86RF211DAI-R datasheet(42/48 Pages) ATMEL

42 / 48 page

AT86RF211

1942C–WIRE–06/02

Digital CMOS DC

Characteristics

Unless otherwise specified, data is given for T = 25°C, V

SUPPLY =2.7V

Note:

1. For digital CMOS pins : SDATA, DATAMSG, DATACLK, WAKEUP.

2. For digital CMOS pins: SLE, SCK, SDATA

3. For digital CMOS pins: DATAMSG

Note:

These timings refer to the Figure 33 on page 25.

Name

Parameter

Conditions

Min

Typ

Max

Units

Vil

CMOS low level input voltage

- Normal input

(2)

- Schmitt trigger input

(3)

0.3*Vcc

0.2*Vcc

Vih

CMOS high level input voltage

- Normal input

(2)

- Schmitt trigger input

(3)

0.7*Vcc

0.85*Vcc

Vol

CMOS low level output voltage

(1)

Iol = 1 mA

0.2*Vcc

Voh

CMOS high level output voltage

(1)

Ioh = - 1 mA

0.8*Vcc

• Timings

Name

Parameter

Conditions

Min

Typ

Max

Units

tr = tf

CMOS rise/fall times

L =50pF;20% to80%

SCK frequency

MHz

SCK period

200

SCK low or high time

tsd

SDATA setup before SCK rising

thd

SDATA hold after SCK rising

tpd

SDATA output propagation delay after SCK falling

(read mode) (C

L =30pF)

250

tpzon

Delay to switch SDATA to output after SCK falling

(read mode)

350

tdle

Minimum delay between an edge of SLE and an

edge of SCK

tpzd

Delay to switch SDATA to input (tri-state) after SLE

rising (read mode)

(1)

Max load for CMOS output pins

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