DP83266 datasheet(131/152 Pages) NSC

131 / 152 page

80 Signal Descriptions

The DP83266 MACSI device is packaged in a 160-pin Plastic Quad Flat Pack The signals are divided into the following

interfaces

Control Interface

Used for microprocessor access to the Ring Engine and Service Engine

PHY Interface

Interface signals to the DP8325155 PLAYER or DP8325657 PLAYERa

External Matching

Interface

Interface signals used for external address matching

LED Interface

Used to control status LEDs

ABus Interface

Multiplexed AddressData System Interface

Electrical Interface

Signals associated with power supply and clocking

81 CONTROL INTERFACE

The Control Interface operates asynchronously to the operation of the data services During an access the external Control Bus

is synchronized with the internal Control Bus

The ACK and INT signals are open drain signals to allow a wired-OR connection of several such signals

Symbol

Description

CBP

155

Control Bus Parity

Odd parity on CBD7 – 0

CBD7 – 0

154 – 147

Control Bus Data

Bidirectional Data bus

CBA8 – 0

144 – 136

Control Bus Address

Address of a particular MACSI device register

130

Control Bus Enable

Handshake signal used to begin a Control Interface access Active low

signal

129

ReadWrite

Determines current direction of a Control Interface access

ACK

133

Acknowledge

Acknowledges that the Control Interface access has been performed Active

low open drain signal

INT1 – 0

131 132

Interrupt

Indicates presence of one or more enabled conditions in the Event Registers One

Interrupt signal is provided as an indication to management services and one is provided as an

indication to data services These can be tied together externally to create a single interrupt

signal if desired Active low open drain signal

131

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