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DP83266 bảng dữ liệu(PDF) 78 Page - National Semiconductor (TI) |
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DP83266 bảng dữ liệu(HTML) 78 Page - National Semiconductor (TI) |
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78 / 152 page ![]() 70 Control Information (Continued) Access Rules Address Read Write 060–06Fh Stop Mode Stop Mode Register Bits D7 D6 D5 D4 D3 D2 D1 D0 PGM10 PGM(87) PGM(86) PGM(85) PGM(84) PGM(83) PGM(82) PGM(81) PGM(80) PGM11 PGM(8F) PGM(8E) PGM(8D) PGM(8C) PGM(8B) PGM(8A) PGM(89) PGM(88) PGM12 PGM(97) PGM(96) PGM(95) PGM(94) PGM(93) PGM(92) PGM(91) PGM(90) PGM13 PGM(9F) PGM(9E) PGM(9D) PGM(9C) PGM(9B) PGM(9A) PGM(99) PGM(98) PGM14 PGM(A7) PGM(A6) PGM(A5) PGM(A4) PGM(A3) PGM(A2) PGM(A1) PGM(A0) PGM15 PGM(AF) PGM(AE) PGM(AD) PGM(AC) PGM(AB) PGM(AA) PGM(A9) PGM(A8) PGM16 PGM(B7) PGM(B6) PGM(B5) PGM(B4) PGM(B3) PGM(B2) PGM(B1) PGM(B0) PGM17 PGM(BF) PGM(BE) PGM(BD) PGM(BC) PGM(BB) PGM(BA) PGM(B9) PGM(B8) PGM18 PGM(C7) PGM(C6) PGM(C5) PGM(C4) PGM(C3) PGM(C2) PGM(C1) PGM(C0) PGM19 PGM(CF) PGM(CE) PGM(CD) PGM(CC) PGM(CB) PGM(CA) PGM(C9) PGM(C8) PGM1A PGM(D7) PGM(D6) PGM(D5) PGM(D4) PGM(D3) PGM(D2) PGM(D1) PGM(D0) PGM1B PGM(DF) PGM(DE) PGM(DD) PGM(DC) PGM(DB) PGM(DA) PGM(D9) PGM(D8) PGM1C PGM(E7) PGM(E6) PGM(E5) PGM(E4) PGM(E3) PGM(E2) PGM(E1) PGM(E0) PGM1D PGM(EF) PGM(EE) PGM(ED) PGM(EC) PGM(EB) PGM(EA) PGM(E9) PGM(E8) PGM1E PGM(F7) PGM(F6) PGM(F5) PGM(F4) PGM(F3) PGM(F2) PGM(F1) PGM(F0) PGM1F PGM(FF) PGM(FE) PGM(FD) PGM(FC) PGM(FB) PGM(FA) PGM(F9) PGM(F8) 753 Claim Information Requested Target Token Rotation Time (TREQ) The Requested Target Token Rotation Time is stored in registers TREQ0 – TREQ3 TREQ(31 – 0) is represented as a negative two’s complement number This value is transmitted in all Claim frames generated by the Ring Engine Bits TREQ(31 – 24) are always transmitted as and compared with FFh and bits TREQ(7 – 0) are always transmitted as and compared with 00h independent of the value stored in the MAC Parameter RAM Bit TREQ(0) is transmitted last TREQ is therefore programmable with 2048 ms resolution and a maximum value of 134 seconds Access Rules Address Read Write 050–053h Stop Mode Stop Mode Register Bits D7 D6 D5 D4 D3 D2 D1 D0 TREQ0 TREQ(31) TREQ(30) TREQ(29) TREQ(28) TREQ(27) TREQ(26) TREQ(25) TREQ(24) TREQ1 TREQ(23) TREQ(22) TREQ(21) TREQ(20) TREQ(19) TREQ(18) TREQ(17) TREQ(16) TREQ2 TREQ(15) TREQ(14) TREQ(13) TREQ(12) TREQ(11) TREQ(10) TREQ(9) TREQ(8) TREQ3 TREQ(7) TREQ(6) TREQ(5) TREQ(4) TREQ(3) TREQ(2) TREQ(1) TREQ(0) 78 |
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