TMS320VC5416 datasheet(16/98 Pages) TI

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Functional Overview

GPIO

MBus

64K RAM

Dual Access

Program/Data

McBSP1

McBSP2

McBSP3

RHEA Bus

APLL

TIMER

JTAG

Clocks

RHEAbus

RHEA

Bridge

TI BUS

xDMA

logic

16K Program

ROM

Enhanced XIO

P, C, D, E Buses and Control Signals

XIO

16HPI

54X cLEAD

16 HPI

64K RAM

Single Access

Program

3.1

Memory

3.1.1

Data Memory

TMS320VC5416

Fixed-Point Digital Signal Processor

SPRS095O – MARCH 1999 – REVISED JANUARY 2005

Table 2-2. Signal Descriptions (continued)

TERMINAL

I/O(1)

DESCRIPTION

NAME

Emulator 1 pin/disable all outputs. When TRST is driven high, EMU1/OFF is used as an interrupt to or from the

emulator system and is defined as input/output by way of IEEE standard 1149.1 scan system. When TRST is

driven low, EMU1/OFF is configured as OFF. The EMU1/OFF signal, when active low, puts all output drivers into

the high-impedance state. Note that OFF is used exclusively for testing and emulation purposes (not for

EMU1/OFF(6)

I/O/Z

multiprocessing applications). Therefore, for the OFF condition, the following apply:

TRST = low,

EMU0 = high

EMU1/OFF = low

The following functional overview is based on the block diagram in Figure 3-1.

Figure 3-1. TMS320VC5416 Functional Block Diagram

The device provides both on-chip ROM and RAM memories to aid in system performance and integration.

The data memory space addresses up to 64K of 16-bit words. The device automatically accesses the

on-chip RAM when addressing within its bounds. When an address is generated outside the RAM bounds,

the device automatically generates an external access.

The advantages of operating from on-chip memory are as follows:

• Higher performance because no wait states are required

• Higher performance because of better flow within the pipeline of the central arithmetic logic unit

(CALU)

• Lower cost than external memory

Functional Overview

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